Job Description:

● Perform physical design implementation which includes Floorplanning, Power Planning, Clock Tree Synthesis, Place and Route, ECO, Equivalency checks

● Timing, physical & electrical verification, driving the signoff closure meeting schedule and design goals

● Prepare deliverables & perform QA

● Communicate with the front end team to develop timing, power and area design targets, and explore design tradeoffs for physical design closure

● Develop flow and methodologies for physical design and automation scripts for various implementation steps

Educational Qualification:  B.Sc/M.Sc in EEE or equivalent disciplines with an emphasis on VLSI design from any reputed university

Additional Job Requirements

● Willing to build a career in the VLSI industry

● Applicants are expected to complete courses that encompass the following topics

 ○   Digital Devices and Electronics

○ VLSI Design with VHDL and/or Verilog

●  Knowledge in IC Physical Design (PnR) or the back end ASIC/SoC design flow will bear significant weight

● Familiarity with C/C++ or any programming language 

● Working knowledge of the Linux environment and scripting languages like Perl, Python, TCL/Tk, shell scripting would be an advantage

● Should be able to multitask and work under pressure

● Should be able to work with teams from different locations and time zones

● Good analytical and debugging capabilities is must 

● Good communication skills, both oral and written 

● Must be able to work well as part of a team

● The high degree of initiative, enthusiasm and out-of-the-box thinking.

Note: Those who already applied to job@ulkasemi.com, No need to apply here.